APC3-A Charge Sampling, Storage & Readout Chip for Silicon Detector Readout RD2 Collaboration
IEEE Transactions on Nuclear Science 41:4 (1994) 1091-1094
Abstract:
The “APC3” is a charge sampling and storage chip designed for high speed readout of silicon detectors. It has 32 channels, each with preamplifier, integrator and storage capacitors. Current from a silicon detector connected to the input is integrated as a charge and stored on a capacitor. There are 128 capacitors per channel which are used sequentially to store the charge. The charge is held on the storage capacitor until it is either read out or discarded. Logic on the chip manages the storage and retrieval of samples. This logic uses a novel architecture based on a system of pointers and read out addresses. This paper describes the operation of the chip and measurements of its performance. © 1994 IEEEDEVELOPMENTS TOWARDS A LARGE-AREA SILICON TRACKER AT LHC
(1994) 410-411
A study of a second level track trigger for ATLAS
Nuclear Inst. and Methods in Physics Research, A 336:1-2 (1993) 59-77
Abstract:
This paper discusses some of the problems of triggering at a high energy, high luminosity pp collider. A suggested second level track trigger for the ATLAS detector is described, based on hit information from a silicon tracker. Detailed Monte Carlo simulations have been performed to assess the performance of the trigger in accepting electrons and in rejecting the QCD jets that would fake electrons in the first level calorimeter trigger. Studies of the feasibility of implementing such a trigger are also presented. © 1993.THE DESIGN AND FUNCTION OF A RADIATION TOLERANT SILICON TRACKER FOR AN LHC EXPERIMENT
NUCL PHYS B (1993) 250-259
Development, characterisation, and deployment of the SNO+ liquid scintillator
JINST