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Abstract:

The Compact Linear Collider is one of the two main European options for a collider in a post Large Hadron Collider era. This is a linear e+e-collider with three center-of-mass energy stages: 380 GeV, 1.5 TeV, and 3 TeV. The luminosity performance of the first stage at 380 GeV is presented including the impact of static and dynamic imperfections. These calculations are performed with fully realistic tracking simulations from the exit of the damping rings to the interaction point and including beam-beam effects in the collisions. A luminosity of 4.3×1034 cm-2 s-1 can be achieved with a perfect collider, which is almost three times the nominal luminosity target of 1.5×1034 cm-2 s-1. In simulations with static imperfections, a luminosity of 2.35×1034 cm-2 s-1 or greater is achieved by 90% of randomly misaligned colliders. Expressed as a percentage of the nominal luminosity target, this is a surplus of approximately 57%. Including the impact of ground motion, a luminosity surplus of 53% or greater can be expected for 90% of colliders. The average expected luminosity is 2.8×1034 cm-2 s-1, which is almost twice the nominal luminosity target.

Abstract:

A system of three low-Q cavity beam position monitors (BPMs), installed in the interaction point (IP) region of the Accelerator Test Facility (ATF2) at KEK, has been designed and optimised for nanometre-level beam position resolution. The BPMs are used to provide an input to a low-latency, intra-train beam position feedback system deployed in single-pass, multi-bunch mode with the aim of demonstrating intra-train beam stabilisation on electron bunches of charge ~1 nC separated in time by 280 ns. In 2016 the BPM resolution was demonstrated to be below 50 nm using the raw measured vertical positions at the three BPMs. New results will be presented utilising integrated sampling of the raw waveforms, improved BPM alignment and modified cavities to demonstrate a vertical position resolution on the order of 20 nm.

Abstract:

A custom 9-channel feedback controller has been developed for low-latency applications in beam-based stabilisation. Fast 14-bit ADCs and DACs are used for highresolution signal conversion and a Xilinx Virtex-5 FPGA is used for core high-bandwidth digital computation. The sampling, and fast digital logic, can be clocked in the range 200 to 400MHz, derived from an external or internal source. A custom data acquisition system, based around LabVIEW, has been developed for real-time control and monitoring at up to 460 kbps transfer rates, and is capable of writing and reading from EPICS data records. Details of the hardware, signal processing, and data acquisition will be presented. Two examples of applications will also be presented: a position and angle bunch-by-bunch feedback system using strip-line beam position monitors to stabilise intra-train positional jitter to below the micron level with a latency less than 154 ns; and a phase feedforward system using RF cavity-based phase monitors to stabilise the downstream rms phase jitter to below 50 fs with a total latency less than the 380 ns beam time-of-flight.